By using this website, your accept the use of cookies for analytical purposes and relevance     Yes, I accept  No, I want to find out more
Thesis subjects
Filter by criteria

DRT: Thesis subject SL-DRT-18-0290

RESEARCH FIELD
Computer science and software / Engineering science
TITLE English Français

Unifying Distributed Memories in Heterogeneous Systems

ABSTRACT

Future computers in high-performance and embedded systems lead to complex memory hierarchies. Hundreds of computing nodes will have to be connected to tera-bytes of memories. In such systems, both the processing units (CPU, GPU, DSP, FPGA) and the memories (DRAM, NVRAM,

FLASH) can be heterogeneous.

Several architectures exist (distributed memory, shared memory, NUMA) with different hardware implementations (cache coherence, communication protocols), software implementations (thread parallelism, OpenMP, transactions) and communication technologies between processing units and memory (MPI, RDMA, RoCE, CCIX, GenZ). None of the approaches above offer a simple, unified programming model and memory model for parallel applications.

The purpose of this Ph.D. Thesis is to study the possibility of using emerging technologies related to computing units, hybrid memories (persistent or not) and remote communication standards in order to accelerate data sharing onto heterogeneous platforms and provide a

convenient programming model.

LOCATION
Département Architectures Conception et Logiciels Embarqués (LIST-LETI)
Laboratoire Calcul Embarqué
Place: Saclay
Start date of the thesis: 01/10/2018
CONTACT PERSON

Loïc CUDENNEC  

CEA
DRT/DACLE//LCE
CEA, LIST, Nano-INNOV / Saclay
PC 172, 91191 Gif-sur-Yvette CEDEX

Phone number: +33 1 69 08 00 58

UNIVERSITY / GRADUATE SCHOOL
Paris-Saclay
Sciences et Technologies de l'Information et de la Communication (STIC)
FIND OUT MORE
THESIS SUPERVISOR

Henri-Pierre CHARLES

CEA
DRT/DACLE//LIALP-LIST
MINATEC Campus
17 rue des Martyrs
38054 Grenoble Cedex 9